linux-dreambox: add dm520 support
[opendreambox.git] / meta-dreambox / recipes-kernel / linux / linux-dreambox-3.4 / 0001-Revert-MIPS-Fix-build-with-binutils-2.24.51.patch
1 From 250c8993aeebd6aa248f056c8c998ac08048a072 Mon Sep 17 00:00:00 2001
2 From: Andreas Monzner <andreas.monzner@dream-property.net>
3 Date: Wed, 11 May 2016 16:35:19 +0200
4 Subject: [PATCH] Revert "MIPS: Fix build with binutils 2.24.51+"
5
6 This reverts commit ee762e46de896d2944eb5f840585e8b4fd9cc046.
7 ---
8  arch/mips/Makefile                  |  9 ---------
9  arch/mips/include/asm/asmmacro-32.h | 12 ------------
10  arch/mips/include/asm/fpregdef.h    | 14 --------------
11  arch/mips/include/asm/mipsregs.h    | 11 +----------
12  arch/mips/kernel/branch.c           |  2 +-
13  arch/mips/kernel/genex.S            |  1 -
14  arch/mips/kernel/r4k_fpu.S          |  6 ------
15  arch/mips/kernel/r4k_switch.S       |  5 -----
16  8 files changed, 2 insertions(+), 58 deletions(-)
17
18 diff --git a/arch/mips/Makefile b/arch/mips/Makefile
19 index 130e264..9f34ac5 100644
20 --- a/arch/mips/Makefile
21 +++ b/arch/mips/Makefile
22 @@ -93,15 +93,6 @@ LDFLAGS_vmlinux                      += -G 0 -static -n -nostdlib
23  KBUILD_AFLAGS_MODULE           += -mlong-calls
24  KBUILD_CFLAGS_MODULE           += -mlong-calls
25  
26 -#
27 -# pass -msoft-float to GAS if it supports it.  However on newer binutils
28 -# (specifically newer than 2.24.51.20140728) we then also need to explicitly
29 -# set ".set hardfloat" in all files which manipulate floating point registers.
30 -#
31 -ifneq ($(call as-option,-Wa$(comma)-msoft-float,),)
32 -       cflags-y                += -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float
33 -endif
34 -
35  cflags-y += -ffreestanding
36  
37  #
38 diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h
39 index e494a0d..2413afe 100644
40 --- a/arch/mips/include/asm/asmmacro-32.h
41 +++ b/arch/mips/include/asm/asmmacro-32.h
42 @@ -13,8 +13,6 @@
43  #include <asm/mipsregs.h>
44  
45         .macro  fpu_save_double thread status tmp1=t0
46 -       .set    push
47 -       SET_HARDFLOAT
48         cfc1    \tmp1,  fcr31
49         sdc1    $f0,  THREAD_FPR0(\thread)
50         sdc1    $f2,  THREAD_FPR2(\thread)
51 @@ -33,12 +31,9 @@
52         sdc1    $f28, THREAD_FPR28(\thread)
53         sdc1    $f30, THREAD_FPR30(\thread)
54         sw      \tmp1, THREAD_FCR31(\thread)
55 -       .set    pop
56         .endm
57  
58         .macro  fpu_save_single thread tmp=t0
59 -       .set    push
60 -       SET_HARDFLOAT
61         cfc1    \tmp,  fcr31
62         swc1    $f0,  THREAD_FPR0(\thread)
63         swc1    $f1,  THREAD_FPR1(\thread)
64 @@ -73,12 +68,9 @@
65         swc1    $f30, THREAD_FPR30(\thread)
66         swc1    $f31, THREAD_FPR31(\thread)
67         sw      \tmp, THREAD_FCR31(\thread)
68 -       .set    pop
69         .endm
70  
71         .macro  fpu_restore_double thread status tmp=t0
72 -       .set    push
73 -       SET_HARDFLOAT
74         lw      \tmp, THREAD_FCR31(\thread)
75         ldc1    $f0,  THREAD_FPR0(\thread)
76         ldc1    $f2,  THREAD_FPR2(\thread)
77 @@ -97,12 +89,9 @@
78         ldc1    $f28, THREAD_FPR28(\thread)
79         ldc1    $f30, THREAD_FPR30(\thread)
80         ctc1    \tmp, fcr31
81 -       .set    pop
82         .endm
83  
84         .macro  fpu_restore_single thread tmp=t0
85 -       .set    push
86 -       SET_HARDFLOAT
87         lw      \tmp, THREAD_FCR31(\thread)
88         lwc1    $f0,  THREAD_FPR0(\thread)
89         lwc1    $f1,  THREAD_FPR1(\thread)
90 @@ -137,7 +126,6 @@
91         lwc1    $f30, THREAD_FPR30(\thread)
92         lwc1    $f31, THREAD_FPR31(\thread)
93         ctc1    \tmp, fcr31
94 -       .set    pop
95         .endm
96  
97         .macro  cpu_save_nonscratch thread
98 diff --git a/arch/mips/include/asm/fpregdef.h b/arch/mips/include/asm/fpregdef.h
99 index 4b002bf..2b5fddc 100644
100 --- a/arch/mips/include/asm/fpregdef.h
101 +++ b/arch/mips/include/asm/fpregdef.h
102 @@ -14,20 +14,6 @@
103  
104  #include <asm/sgidefs.h>
105  
106 -/*
107 - * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
108 - * hardfloat and softfloat object files.  The kernel build uses soft-float by
109 - * default, so we also need to pass -msoft-float along to GAS if it supports it.
110 - * But this in turn causes assembler errors in files which access hardfloat
111 - * registers.  We detect if GAS supports "-msoft-float" in the Makefile and
112 - * explicitly put ".set hardfloat" where floating point registers are touched.
113 - */
114 -#ifdef GAS_HAS_SET_HARDFLOAT
115 -#define SET_HARDFLOAT .set hardfloat
116 -#else
117 -#define SET_HARDFLOAT
118 -#endif
119 -
120  #if _MIPS_SIM == _MIPS_SIM_ABI32
121  
122  /*
123 diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
124 index 818ac6c..2b83c36 100644
125 --- a/arch/mips/include/asm/mipsregs.h
126 +++ b/arch/mips/include/asm/mipsregs.h
127 @@ -1146,27 +1146,18 @@ do {                                                                    \
128  /*
129   * Macros to access the floating point coprocessor control registers
130   */
131 -#define _read_32bit_cp1_register(source, gas_hardfloat)         \
132 +#define read_32bit_cp1_register(source)                         \
133  ({ int __res;                                                   \
134         __asm__ __volatile__(                                   \
135         ".set\tpush\n\t"                                        \
136         ".set\treorder\n\t"                                     \
137         /* gas fails to assemble cfc1 for some archs (octeon).*/ \
138         ".set\tmips1\n\t"                                       \
139 -       STR(gas_hardfloat)"\n\t"                                \
140          "cfc1\t%0,"STR(source)"\n\t"                            \
141         ".set\tpop"                                             \
142          : "=r" (__res));                                        \
143          __res;})
144  
145 -#ifdef GAS_HAS_SET_HARDFLOAT
146 -#define read_32bit_cp1_register(source)                                        \
147 -       _read_32bit_cp1_register(source, .set hardfloat)
148 -#else
149 -#define read_32bit_cp1_register(source)                                        \
150 -       _read_32bit_cp1_register(source, )
151 -#endif
152 -
153  #define rddsp(mask)                                                    \
154  ({                                                                     \
155         unsigned int __res;                                             \
156 diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
157 index 1d3ffba..0bf6f0f 100644
158 --- a/arch/mips/kernel/branch.c
159 +++ b/arch/mips/kernel/branch.c
160 @@ -188,7 +188,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
161         case cop1_op:
162                 preempt_disable();
163                 if (is_fpu_owner())
164 -                       fcr31 = read_32bit_cp1_register(CP1_STATUS);
165 +                       asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
166                 else
167                         fcr31 = current->thread.fpu.fcr31;
168                 preempt_enable();
169 diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
170 index 69542ce..8882e57 100644
171 --- a/arch/mips/kernel/genex.S
172 +++ b/arch/mips/kernel/genex.S
173 @@ -388,7 +388,6 @@ NESTED(nmi_handler, PT_SIZE, sp)
174         .set    push
175         /* gas fails to assemble cfc1 for some archs (octeon).*/ \
176         .set    mips1
177 -       SET_HARDFLOAT
178         cfc1    a1, fcr31
179         li      a2, ~(0x3f << 12)
180         and     a2, a1
181 diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
182 index 72a29b7f..55ffe14 100644
183 --- a/arch/mips/kernel/r4k_fpu.S
184 +++ b/arch/mips/kernel/r4k_fpu.S
185 @@ -33,8 +33,6 @@
186         .set    mips3
187  
188  LEAF(_save_fp_context)
189 -       .set    push
190 -       SET_HARDFLOAT
191         cfc1    t1, fcr31
192  
193  #ifdef CONFIG_64BIT
194 @@ -77,7 +75,6 @@ LEAF(_save_fp_context)
195         EX      sw t1, SC_FPC_CSR(a0)
196         jr      ra
197          li     v0, 0                                   # success
198 -       .set    pop
199         END(_save_fp_context)
200  
201  #ifdef CONFIG_MIPS32_COMPAT
202 @@ -116,8 +113,6 @@ LEAF(_save_fp_context32)
203   *  - cp1 status/control register
204   */
205  LEAF(_restore_fp_context)
206 -       .set    push
207 -       SET_HARDFLOAT
208         EX      lw t0, SC_FPC_CSR(a0)
209  #ifdef CONFIG_64BIT
210         EX      ldc1 $f1, SC_FPREGS+8(a0)
211 @@ -156,7 +151,6 @@ LEAF(_restore_fp_context)
212         ctc1    t0, fcr31
213         jr      ra
214          li     v0, 0                                   # success
215 -       .set    pop
216         END(_restore_fp_context)
217  
218  #ifdef CONFIG_MIPS32_COMPAT
219 diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
220 index d839b76..46389472 100644
221 --- a/arch/mips/kernel/r4k_switch.S
222 +++ b/arch/mips/kernel/r4k_switch.S
223 @@ -152,9 +152,6 @@ LEAF(_restore_fp)
224  
225  #define FPU_DEFAULT  0x00000000
226  
227 -       .set push
228 -       SET_HARDFLOAT
229 -
230  LEAF(_init_fpu)
231  #ifdef CONFIG_MIPS_MT_SMTC
232         /* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */
233 @@ -253,5 +250,3 @@ LEAF(_init_fpu)
234  #endif
235         jr      ra
236         END(_init_fpu)
237 -
238 -       .set pop
239 -- 
240 1.9.1
241